hal: microchip: add the USART SWRST alias the four mapping packs lack - #73
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NhMchp merged 1 commit intoAug 27, 2026
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Each of these headers maps the generic SERCOM_USART_ names onto its own pack's SERCOM_USART_INT_ ones, 47 definitions apiece, and CTRLA_SWRST is missing from every one of them. Only the PIC32CM SG/GC and PL packs define the generic spelling natively, so a driver line that resets a SERCOM through SERCOM_USART_CTRLA_SWRST_Msk compiles on those two families and on no other. uart_mchp_sercom_g1.c is gaining exactly such a line, to reset a USART that a bootloader handed over still enabled. Without these four definitions that change would break PIC32CM JH, PIC32CX SG, PIC32CZ CA and SAM D5x/E5x, which is every other in-tree user of the driver. The mask is bit 0 of CTRLA in both the INT and the EXT register views, so mapping to the INT spelling matches the 47 lines already in each file. Signed-off-by: Arkadiusz Grzelka <devitwise@gmail.com>
Madhan-Kurukondar
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Aug 19, 2026
Madhan-Kurukondar
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Thank you. This looks fine
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Thanks for the review. Is anything else needed here before this can merge? Asking because it sits on the critical path for a Zephyr-side change: the SERCOM G1 UART driver has to reset a peripheral the bootloader left enabled, and that needs the USART SWRST alias this pull request adds. We are holding that one back rather than opening a pull request that would not build until this has landed. |
NhMchp
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Aug 27, 2026
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uart_mchp_sercom_g1.c is gaining a SERCOM software reset for a USART the bootloader handed over enabled, and the generic name it uses is defined natively only by the SG/GC and PL packs, so the four packs that map the generic USART names need the missing alias or the change breaks every other in-tree user of the driver.
One name missing from forty-seven, four times over
Four pack headers map the generic
SERCOM_USART_names onto their ownSERCOM_USART_INT_ones -sercom_pic32cm_jh.h,sercom_pic32cx_sg.h,sercom_pic32cz_ca.handsercom_samd5xe5x.h- forty-seven definitionsapiece, and
CTRLA_SWRSTis in none of them. Only the PIC32CM SG/GC and PLpacks spell it natively, because their SERCOM has a single USART register
view rather than an INT/EXT pair.
Nothing noticed, because
uart_mchp_sercom_g1.cnever reset a SERCOM.Why now
The Zephyr change
serial-mchp-sercom-resetadds exactly that: a USARThanded over by a bootloader arrives still enabled, and an enable-protected
register cannot be written in that state, so the driver disables and then
software-resets before configuring. The line it needs is
which compiles on this board's family and on nothing else.
Evidence
pic32cm_jh01_cpro'SERCOM_USART_CTRLA_SWRST_Msk' undeclaredsam_e54_xpro'SERCOM_USART_CTRLA_SWRST_Msk' undeclaredpic32cm_gc00_cproScope
One line per header, four headers, the same one-line form as the
forty-seven already in each.
SWRSTis bit 0 ofCTRLAin both the INT andthe EXT register view of every one of these packs, so mapping to the INT
spelling - which is what all forty-seven neighbours do - is the same bit
either way. Nothing that compiles today changes meaning.
Testing
samples/hello_worldonpic32cm_jh01_cproandsam_e54_xpro, with theZephyr serial patch in the tree, before and after. No board of any of these
four families is on this bench, so the rung that could watch the reset
happen is
UNVERIFIED; the reset itself is measured onpic32cm_gc00_cpro, which does not need this change.Verification
Built in the project's dev container, whose west workspace applies this
change as a module patch. This is the consumer-side pair of
zephyrproject-rtos/zephyr'sserial-mchp-sercom-reset, and it has to landin the same window or that change breaks four families.