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@dgarske dgarske commented Dec 26, 2025

PolarFire SoC eMMC/SD improvements and RISC-V boot code unification

Summary

This PR improves the PolarFire SoC (MPFS250) support with eMMC/SD driver stabilization, DMA read support, and fixes a Yocto Linux boot issue. Additionally, it refactors the RISC-V boot code to unify 32-bit and 64-bit architectures into a single codebase.

Changes

PolarFire SoC eMMC/SD Improvements

  • Added PLIC (Platform-Level Interrupt Controller) support for handling MMC interrupts
  • Implemented DMA read support for SD card operations (significant performance improvement)
  • Improved driver stability and timeout handling
  • Added MMC interrupt handler with proper interrupt claim/complete flow

RISC-V Boot Code Refactoring

  • Unified 32-bit and 64-bit boot code into single files using __riscv_xlen conditional compilation:
    • src/boot_riscv.c (removed boot_riscv64.c)
    • src/boot_riscv_start.S (removed boot_riscv64_start.S)
    • src/vector_riscv.S (removed vector_riscv64.S)
  • Created new hal/riscv.h header with common RISC-V definitions (CSRs, register sizes, trap handling macros)

Yocto Linux Boot Fix

  • Fixed SMP boot issue where hartid wasn't being properly passed to the Linux kernel
  • Implemented proper kernel boot protocol per RISC-V Linux documentation:
    • a0 = hartid of the boot core
    • a1 = physical address of the device tree blob (DTB)
    • satp = 0 (MMU disabled)
  • The hartid is now preserved from the prior boot stage (HSS) via the tp register

Documentation

  • Updated PolarFire example boot output with timing information
  • Updated TODO list (DMA read and timeout handling now complete)

Files Changed

File Change
hal/mpfs250.c PLIC and DMA support for eMMC/SD
hal/mpfs250.h New PLIC and interrupt definitions
hal/riscv.h New - Common RISC-V definitions
src/boot_riscv.c Unified 32/64-bit boot with hartid fix
src/boot_riscv_start.S Unified startup code (renamed from boot_riscv64_start.S)
src/vector_riscv.S Unified vector table with xlen-aware macros
src/boot_riscv64.c Removed
src/vector_riscv64.S Removed
src/update_disk.c Minor fixes
src/x86/common.c Related timing improvements
include/hal.h New HAL function declarations
arch.mk Build system updates for unified RISC-V files
docs/Targets.md Updated example output and TODO

Testing

  • Tested on Microchip PolarFire SoC (MPFS250) with Yocto Linux
  • Verified SMP boot with proper hartid handling
  • Confirmed DMA read performance improvements

@dgarske dgarske self-assigned this Dec 26, 2025
…. Refactor the RISC-V boot/vector code for use on both 32-bit and 64-bit architectures.
@dgarske dgarske changed the title PolarFire SoC eMMC/SD Read simple DMA support PolarFire SoC eMMC/SD improvements and RISC-V boot code unification Dec 29, 2025
@dgarske dgarske marked this pull request as ready for review December 29, 2025 20:23
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3 participants