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[CUDA][TMA] Separate atomic-add dtype support from layout encoding - #2846

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LeiWang1999 merged 1 commit into
tile-ai:mainfrom
LeiWang1999:fix/tma-atomic-add-layout
Aug 3, 2026
Merged

[CUDA][TMA] Separate atomic-add dtype support from layout encoding#2846
LeiWang1999 merged 1 commit into
tile-ai:mainfrom
LeiWang1999:fix/tma-atomic-add-layout

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@LeiWang1999

@LeiWang1999 LeiWang1999 commented Aug 2, 2026

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Summary

  • Separate PTX TMA reduce-add dtype support from shared-memory layout encoding.
  • Preserve legal uint64 reductions with a TensorMap-compatible linear layout.
  • Reject unsupported targets, dtypes, and layouts with actionable diagnostics instead of silently selecting no swizzle.

Changes

  • Add shared TMA layout analysis that recovers CuTe composed layouts, validates TensorMap swizzles, and records shared-memory alignment requirements.
  • Reuse the shared analysis in TMA copy and atomic-add lowering.
  • Replace GEMM-oriented atomic-add layout inference with operation-specific 32B, 64B, 128B, or linear selection.
  • Derive descriptor dtype, swizzle, alignment, and split width from a validated lowering plan.
  • Cover PTX-supported and unsupported dtypes, pre-Hopper targets, incompatible explicit layouts, uint64 execution, and 32B swizzle splitting.

Validation

  • ./format.sh
  • cmake --build build -j$(nproc)
  • python -m pytest -q testing/python/language/test_tilelang_language_atomic.py -k tma_atomic_add
  • python -m pytest -q testing/python/language/test_tilelang_language_tma_copy.py testing/python/transform/test_tilelang_transform_smem_swizzle_alignment.py

Notes

  • uint64 intentionally uses unswizzled linear shared storage because the existing 64-bit GEMM K-inner layout is not representable by a TensorMap descriptor.

Summary

  • Added shared TMA layout analysis for CuTe composed layouts, TensorMap swizzle validation, and shared-memory alignment requirements.
  • Reused the analysis for TMA copy and atomic-add lowering.
  • Updated atomic-add lowering to select operation-specific 32B, 64B, 128B, or linear layouts.
  • Derived descriptor dtype, swizzle, alignment, and split width from validated lowering plans.
  • Added actionable diagnostics for unsupported targets, dtypes, layouts, and incompatible explicit layouts.
  • Added coverage for supported and unsupported PTX dtypes, pre-Hopper targets, uint64, invalid layouts, and 32B swizzle splitting.
  • Kept uint64 on unswizzled linear shared storage because the existing 64-bit GEMM K-inner layout cannot be represented by a TensorMap descriptor.

C++ style / lint notes

  • The PR changes C++ implementation and header files.
  • The PR does not document changes to rules in docs/developer_guide/cpp_style.md.
  • The C++ API Style Audit (warning only) may report advisory findings such as TLCPP003 or TLCPP004. These findings are not merge blockers unless they introduce a clear API, FFI, or maintainability risk.
  • No correctness, build, or test issue is identified from the provided validation summary.

Testing

  • Formatting validation completed.
  • Compilation validation completed.
  • Targeted atomic-add pytest validation completed.

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👋 Hi! Thank you for contributing to the TileLang project.

Please remember to run pre-commit run --all-files in the root directory of the project to ensure your changes are properly linted and formatted. This will help ensure your contribution passes the format check.

We appreciate you taking this step! Our team will review your contribution, and we look forward to your awesome work! 🚀

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Review Change Stack

📝 Walkthrough

Walkthrough

CUDA TMA layout analysis is centralized for shared-memory encodings and alignment. Atomic-add lowering now validates targets, dtypes, layouts, and descriptor parameters. Bulk-copy lowering uses the same analysis. Atomic-add tests cover additional dtypes, swizzles, targets, and diagnostics.

Changes

CUDA TMA layout and atomic add

Layer / File(s) Summary
TMA layout analysis helpers
src/cuda/op/tma_layout.h, src/cuda/op/tma_layout.cc
Adds shared-memory TMA encoding structures, layout analysis, swizzle validation, and conditional alignment enforcement.
Atomic add analysis and lowering
src/cuda/op/atomic_add.cc, testing/python/language/test_tilelang_language_atomic.py
Validates TMA targets, dtypes, and layouts. Lowering uses analyzed swizzle, dtype, alignment, and instruction-width metadata. Tests cover uint64, 32-byte swizzles, descriptor layouts, unsupported dtypes, invalid layouts, and pre-Hopper targets.
Bulk-copy TMA integration
src/cuda/op/copy.cc
Bulk-copy lowering uses shared TMA layout analysis and reports analysis reasons through fallback handling. Gather4, scatter4, and Im2Col alignment use SwizzleMode::FromOrdinal.

Estimated code review effort: 4 (Complex) | ~45 minutes

Possibly related PRs

Suggested reviewers: siriusneo, penguin-wwy

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Description Check ✅ Passed Check skipped - CodeRabbit’s high-level summary is enabled.
Title check ✅ Passed The title clearly summarizes the main change: separating TMA atomic-add dtype support from shared-memory layout encoding.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
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Actionable comments posted: 2

🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Inline comments:
In `@src/cuda/op/atomic_add.cc`:
- Around line 449-459: Update the TMA atomic-add validation around
instruction_dim and desc.smem_box in the visible lowering path to ensure the
global_range extent is divisible by the swizzle element width when swizzling is
enabled. Add a clear assertion for this unsupported remainder case, or lower the
descriptor to complete swizzle atoms and explicitly process any remainder
outside TMA; preserve the existing non-swizzled behavior.

In `@testing/python/language/test_tilelang_language_atomic.py`:
- Around line 383-389: Update test_tma_atomic_add_rejects_unsupported_dtype so
the regex interpolates the plain dtype name via str(dtype), matching the C++
diagnostic for TileLang dtype instances while preserving the existing
unsupported-dtype coverage.
🪄 Autofix (Beta)

Fix all unresolved CodeRabbit comments on this PR:

  • Push a commit to this branch (recommended)
  • Create a new PR with the fixes

ℹ️ Review info
⚙️ Run configuration

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Pro Plus

Run ID: 4ced9527-b0e9-4749-ae05-03e54f0332b3

📥 Commits

Reviewing files that changed from the base of the PR and between 6b81bb8 and e0f0ac9.

📒 Files selected for processing (5)
  • src/cuda/op/atomic_add.cc
  • src/cuda/op/copy.cc
  • src/cuda/op/tma_layout.cc
  • src/cuda/op/tma_layout.h
  • testing/python/language/test_tilelang_language_atomic.py

Comment thread src/cuda/op/atomic_add.cc
Comment on lines +449 to 459
desc.swizzle = plan.swizzle_mode.CanonicalOrdinal();
RequireTMASmemAlignment(lower_args, shared_tensor, plan.swizzle_mode);

auto inner_box_dim = as_const_int(desc.smem_box[0]);
ICHECK(inner_box_dim != nullptr)
<< "inner_box_dim must be a constant integer for TMA atomic add";
int instruction_dim = *inner_box_dim;
if (desc.swizzle == static_cast<int>(CU_TENSOR_MAP_SWIZZLE_64B)) {
instruction_dim = 64 / shared_tensor->dtype.bytes();
} else if (desc.swizzle == static_cast<int>(CU_TENSOR_MAP_SWIZZLE_128B)) {
instruction_dim = 128 / shared_tensor->dtype.bytes();
if (!plan.swizzle_mode.IsNone()) {
instruction_dim =
plan.swizzle_mode.ByteWidth() / shared_tensor->dtype.bytes();
}

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🎯 Functional Correctness | 🟠 Major | 🏗️ Heavy lift

🧩 Analysis chain

🏁 Script executed:

#!/bin/bash
# Description: Check whether TMA atomic add constrains the global range extent to the shared tile extent.
set -euo pipefail

echo "=== atomic_add lowering: box vs shared shape ==="
rg -nP -C 6 'smem_box|inner_box_dim|instruction_dim' src/cuda/op/atomic_add.cc

echo "=== range-equality checks in the atomic add op ==="
rg -nP -C 6 'src_range|dst_range' src/op/atomic_add.cc src/cuda/op/atomic_add.cc 2>/dev/null || true
fd -t f 'atomic_add' src --exec rg -nP -C 4 'ICHECK.*(range|extent)' {}

echo "=== tests that atomic-add a sub-tile ==="
rg -nP -C 6 'atomic_add\(.*use_tma' testing/python --glob '*.py'

Repository: tile-ai/tilelang

Length of output: 13223


🏁 Script executed:

#!/bin/bash
set -euo pipefail

echo '=== src/cuda/op/atomic_add.cc relevant sections ==='
sed -n '1,240p' src/cuda/op/atomic_add.cc
printf '\n--- TMA lowering section ---\n'
sed -n '240,570p' src/cuda/op/atomic_add.cc

echo '=== src/op/atomic_add.cc ==='
sed -n '1,180p' src/op/atomic_add.cc

echo '=== TMA atomic add layout helpers ==='
rg -nP -C 8 'MakeTMAAtomicAddSharedLayout|RequireTMASmemAlignment|IsValidTMAReduceAddDtype|SwizzleMode|canonical|canonical ordinal' src/cuda/op/atomic_add.cc src --glob '*.cc' --glob '*.h' --glob '*.hpp' 2>/dev/null || true

Repository: tile-ai/tilelang

Length of output: 50372


🏁 Script executed:

#!/bin/bash
set -euo pipefail

echo "=== exact references to src_range/dst_range equality/constraint ==="
rg -n 'src_range|dst_range' src/cuda/op/atomic_add.cc
rg -n 'src_range|dst_range' src/op/atomic_add.cc
rg -n 'dst_range.size.*src_range|src_range.size.*dst_range|src_range.*dst_range|src_range.*==|dst_range.*==' src testing 2>/dev/null | head -80 || true

echo "=== MakeTMAAtomicAddSharedLayout constraints ==="
sed -n '145,177p' src/cuda/op/atomic_add.cc

echo "=== TMA atomic add test files ==="
fd -t f 'atomic_add' tests testing examples 2>/dev/null || true
rg -n -C 4 'tl\.atomic_add.*use_tma|use_tma.*true|atomic_add\(' testing tests examples 2>/dev/null | head -160 || true

Repository: tile-ai/tilelang

Length of output: 19380


🌐 Web query:

CUDA TMA atomic add swizzle descriptor smem_box alignment instruction boundary

💡 Result:

The Tensor Memory Accelerator (TMA) in CUDA requires specific alignment and descriptor configurations to function correctly, particularly when using shared memory (SMEM) swizzling [1][2][3]. 1. Alignment Requirements: TMA destinations in shared memory must be 128-byte aligned [2]. Failure to align the destination buffer to this 128-byte boundary can result in silent data corruption or hardware faults, as there is no runtime check performed by the hardware [2]. 2. SMEM Box and Descriptor Configuration: - The TMA descriptor (a 128-byte opaque structure) encodes the tensor's metadata, including the SMEM box size, strides, and swizzle mode [1][2][3]. - The smem_box defines the shape of the tile as it is laid out in shared memory [1][3]. - When swizzling is applied, the TMA engine rearranges the byte layout in shared memory to avoid bank conflicts [2][3]. The swizzle mode (e.g., SWIZZLE_64B, SWIZZLE_128B) determines the swizzle atom size and pattern [4][5][6]. - The smem_box dimension must be compatible with the selected swizzle mode [4][5]. For example, if a 128B swizzle is used, the instruction dimension in the smem_box calculation often needs to match or be a multiple of the swizzle atom size [4][5]. 3. Instruction Boundaries: The TMA engine operates using atomic "swizzle atoms" [4]. If the inner dimension of the data tile in bytes exceeds the swizzle span (the repeat window of the pattern), the swizzle pattern repeats, which can inadvertently lead to bank conflicts [4]. Consequently, developers must ensure that the box dimensions, swizzle mode, and data types are mathematically consistent so that the TMA hardware can correctly decode the memory layout without violating alignment or bank-access constraints [4][5][7]. In practice, these descriptors are typically generated on the host using the CUDA Driver API (cuTensorMapEncodeTiled) or via libraries like CUTLASS, which automatically manage the mapping between logical tensor coordinates, SMEM swizzle patterns, and TMA hardware requirements [8][2][9][7].

Citations:


Ensure the atomic-add global range fits the TMA swizzle atom.

instruction_dim is computed from the shared swizzle width, and ICHECK((*inner_box_dim) % instruction_dim == 0) uses desc.smem_box[0], which comes from global_range extents. For TMA global accesses with swizzle, the global tile must also be a multiple of the swizzle element width, so this should either be enforced with a clear assertion or handled by lowering the descriptor to the usable swizzle atom and looping over the remainder outside the TMA descriptor.

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@src/cuda/op/atomic_add.cc` around lines 449 - 459, Update the TMA atomic-add
validation around instruction_dim and desc.smem_box in the visible lowering path
to ensure the global_range extent is divisible by the swizzle element width when
swizzling is enabled. Add a clear assertion for this unsupported remainder case,
or lower the descriptor to complete swizzle atoms and explicitly process any
remainder outside TMA; preserve the existing non-swizzled behavior.

Comment on lines +383 to 389
@pytest.mark.parametrize("dtype", [T.int16, T.int64, T.float64, T.float32x2])
def test_tma_atomic_add_rejects_unsupported_dtype(dtype):
with pytest.raises(Exception, match=rf"TMA atomic add does not support dtype {dtype}.*supported scalar dtypes"):
with pytest.raises(
tvm.error.InternalError,
match=rf"TMA atomic add does not support dtype {dtype}.*supported scalar dtypes",
):
lower_tma_atomic_add(dtype)

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🎯 Functional Correctness | 🟡 Minor | ⚡ Quick win

🧩 Analysis chain

🏁 Script executed:

#!/bin/bash
# Description: Check how tilelang dtype classes stringify.
set -euo pipefail

rg -nP -C 8 '__str__|__repr__|class\s+_?DTypeMeta|metaclass=' tilelang/language/dtypes.py

echo "=== other tests interpolating a T.<dtype> into a match pattern ==="
rg -nP -C 3 'match=.*\{dtype\}' testing/python --glob '*.py'

Repository: tile-ai/tilelang

Length of output: 154


🏁 Script executed:

#!/bin/bash
set -euo pipefail

echo "=== locate dtypes/test files ==="
git ls-files | rg '(^|/)dtypes\.py$|test_tilelang_language_atomic\.py$|testing/python|tilelang' | head -200

echo "=== file existence ==="
for f in tilelang/language/dtypes.py testing/python/language/test_tilelang_language_atomic.py; do
  if [ -f "$f" ]; then
    echo "FOUND $f"
    wc -l "$f"
  else
    echo "MISSING $.f"
  fi
done

echo "=== search __str__/__repr__/metaclass in likely files ==="
rg -n -C 6 '__str__|__repr__|class\s+_?DTypeMeta|metaclass=' $(git ls-files | rg 'dtype|test_tilelang_language_atomic') || true

Repository: tile-ai/tilelang

Length of output: 11365


🏁 Script executed:

#!/bin/bash
set -euo pipefail

echo "=== dtypes.py relevant definitions ==="
rg -n -C 12 'class .*DType|def __str__|def __repr__|metaclass|class .*Meta' tilelang/language/dtypes.py

echo "=== test dtype parameterization around TMA test ==="
sed -n '340,410p' testing/python/language/test_tilelang_language_atomic.py

echo "=== imports in test file around top ==="
sed -n '1,80p' testing/python/language/test_tilelang_language_atomic.py

echo "=== precise Python string behavior for a DType instance/class if sources define custom __str__/__repr__ ==="
python3 - <<'PY'
from tilelang.language.dtypes import DType
print("DType is class:", DType)
dt = DType("float32x2")
print("Dtype instance str:", str(dt))
print("Dtype instance repr:", repr(dt))

D = type("DtypeClass", (), {"name": "float32x2"})
print("DtypeClass:", D)
print("DtypeClass str:", str(D))
print("DtypeClass repr:", repr(D))
PY

Repository: tile-ai/tilelang

Length of output: 193


🏁 Script executed:

#!/bin/bash
set -euo pipefail

echo "=== top dtypes.py ==="
sed -n '1,220p' tilelang/language/dtypes.py

echo "=== any DType definitions/types/strings in tilelang/language/dtypes.py ==="
python3 - <<'PY'
from pathlib import Path
p=Path('tilelang/language/dtypes.py')
text=p.read_text(errors='replace')
for i,line in enumerate(text.splitlines(),1):
    if 'DType' in line or 'dtype' in line.lower() or 'str(' in line.lower() or 'repr(' in line.lower() or 'metaclass' in line.lower():
        print(f'{i}: {line}')
PY

echo "=== runtime probe if package importable ==="
python3 - <<'PY'
try:
    import tilelang.language.dtypes as dpy
    print("imports_ok=True")
    for name in ['DType','float32x2','int16','int64','float64','float32x2']:
        obj=getattr(dpy, name, None)
        print(f"{name}: {obj!r} str={str(obj)} repr={repr(obj)}")
    dt=dpy.float32x2()
    print(f"float32x2 instance: {dt!r} str={str(dt)} repr={repr(dt)}")
except Exception as e:
    print(f"imports_ok=False: {type(e).__name__}: {e}")
PY

echo "=== test file relevant sections ==="
sed -n '1,80p' testing/python/language/test_tilelang_language_atomic.py
sed -n '340,410p' testing/python/language/test_tilelang_language_atomic.py

Repository: tile-ai/tilelang

Length of output: 33162


🏁 Script executed:

#!/bin/bash
set -euo pipefail

echo "=== Python class repr/string behavior ==="
python3 <<'PY'
class dtype:
    def __init__(self, value):
        self.value = value
T = type("T", (), {})
T.int16 = dtype("int16")
T.float32x2 = dtype("float32x2")
for dtype in [T.int16, T.float32x2]:
    print("dtype:", dtype)
    print("  str:", str(dtype))
    print("  repr:", repr(dtype))
    print("  rf-matches:", bool(__import__("re").match(rf"TMA atomic add does not support dtype {dtype}.*supported scalar dtypes", "TMA atomic add does not support dtype int16...")))
PY

echo "=== lower_tma_atomic_add references and TMA error text ==="
rg -n -C 8 'def lower_tma_atomic_add|lower_tma_atomic_add\(|TMA atomic add|does not support dtype|supported scalar dtypes' testing/python/language tilelang --glob '*.py' || true

Repository: tile-ai/tilelang

Length of output: 7909


Interpolate the plain dtype name in the TMA atomic-add rejection test.

dtype values such as T.float32x2 are TileLang dtype instances, not strings. Without an explicit dtype name, rf"... {dtype}" expands to the object representation and cannot match the C++ diagnostic. Use str(dtype) or the dtype value explicitly in the expected message.

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@testing/python/language/test_tilelang_language_atomic.py` around lines 383 -
389, Update test_tma_atomic_add_rejects_unsupported_dtype so the regex
interpolates the plain dtype name via str(dtype), matching the C++ diagnostic
for TileLang dtype instances while preserving the existing unsupported-dtype
coverage.

@LeiWang1999

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@regression-perf

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github-actions Bot commented Aug 2, 2026

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Performance Regression Test Report

Triggered by: @LeiWang1999
Workflow run: https://github.com/tile-ai/tilelang/actions/runs/30753772445

Results

File Original Latency Current Latency Speedup
example_topk 0.0440679 0.0495508 0.889347
example_warp_specialize_gemm_copy_1_gemm_0 0.0154318 0.0159382 0.968225
example_warp_specialize_gemm_softpipe_stage2 0.0154803 0.0158787 0.974909
example_dequant_gemm_fp4_hopper 0.529019 0.534128 0.990435
example_vertical_slash_sparse_attn 0.135373 0.136638 0.990741
example_dequant_gemm_bf16_fp4_hopper 0.267211 0.268991 0.993382
example_mha_inference 0.0329126 0.0330394 0.996162
example_per_token_cast_to_fp8 0.00431421 0.00432899 0.996587
example_dequant_gemm_w4a8 2.67936 2.68825 0.996696
example_mha_sink_bwd_bhsd 0.0408248 0.0409599 0.996702
example_gemm_intrinsics 0.0201329 0.0201864 0.997351
example_convolution 0.584245 0.585374 0.998072
example_mha_sink_bwd_bhsd_sliding_window 0.0261317 0.0261748 0.998353
example_mha_fwd_bhsd 0.00689374 0.00690474 0.998406
example_blocksparse_gemm 0.0117381 0.0117551 0.998549
example_mhc_post 0.065735 0.0658232 0.998659
example_tilelang_gemm_splitk_vectorize_atomicadd 0.584486 0.584997 0.999126
example_tilelang_gemm_splitk 0.59028 0.590734 0.999231
example_fusedmoe_tilelang 0.076536 0.0765888 0.999312
example_elementwise_add 0.0691197 0.06916 0.999418
example_warp_specialize_gemm_copy_0_gemm_1 0.0235405 0.0235526 0.999484
example_dynamic 0.388099 0.388288 0.999513
example_mha_fwd_bshd 0.0147871 0.0147906 0.999759
example_mhc_pre 0.115504 0.115511 0.999939
example_gqa_bwd_tma_reduce_varlen 0.0278442 0.0278455 0.999954
example_linear_attn_bwd 0.0970341 0.097029 1.00005
example_tilelang_gemm_fp8_2xAcc 0.0678373 0.0678252 1.00018
block_sparse_attn_tilelang 0.00615403 0.00615289 1.00019
example_gqa_fwd_bshd 0.0297147 0.0297034 1.00038
sparse_mla_bwd 0.136075 0.135971 1.00076
example_convolution_autotune 0.591799 0.591251 1.00093
example_gemv 0.14819 0.148049 1.00095
example_gqa_bwd 0.0288938 0.0288631 1.00107
example_tilelang_sparse_gqa_decode_varlen_mask 0.0282547 0.0282238 1.00109
example_gqa_decode 0.0305202 0.0304825 1.00124
example_group_per_split_token_cast_to_fp8 0.00562839 0.00562095 1.00132
example_gqa_sink_bwd_bhsd 0.0252179 0.0251796 1.00152
example_gqa_sink_bwd_bhsd_sliding_window 0.0153016 0.0152681 1.00219
example_mha_fwd_varlen 0.0206267 0.0205597 1.00326
example_linear_attn_fwd 0.0228922 0.0228175 1.00327
example_gemm 0.0148024 0.0147537 1.0033
example_warp_specialize_gemm_barrierpipe_stage2 0.024835 0.0247506 1.00341
example_mha_sink_fwd_bhsd_sliding_window 0.00975491 0.00972138 1.00345
example_mha_sink_fwd_bhsd 0.00986525 0.00983089 1.0035
example_tilelang_nsa_fwd 0.00406296 0.00404843 1.00359
example_tilelang_sparse_gqa_decode_varlen_indice 0.010814 0.0107689 1.00418
example_mha_bwd_bshd 0.0139726 0.013911 1.00443
example_tilelang_nsa_decode 0.00419358 0.00417408 1.00467
example_tilelang_gemm_fp8 0.171156 0.170323 1.00489
sparse_mla_fwd_pipelined 0.0347884 0.0346191 1.00489
fp8_lighting_indexer 0.0120312 0.0119717 1.00497
example_dequant_gemv_fp16xint4 0.017444 0.0173534 1.00522
topk_selector 0.0272656 0.0270935 1.00635
sparse_mla_fwd 0.0532247 0.0528458 1.00717
example_dequant_gemm_bf16_mxfp4_hopper 0.25775 0.255905 1.00721
example_tilelang_block_sparse_attn 0.00573083 0.00568219 1.00856
example_mha_bwd_bhsd 0.0140574 0.0139243 1.00956
example_mla_decode 0.302608 0.299674 1.00979

Artifacts

  • regression_result.png (speedup plot) is attached as a workflow artifact. Download it from the workflow run page above.

@LeiWang1999
LeiWang1999 merged commit 9e13487 into tile-ai:main Aug 3, 2026
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