Make x86 store forwarding mixed size

[s-prism]

This is based on the herd mixed-size model https://github.com/herd/herdtools7/blob/master/herd/libdir/x86tso-mixed.cat

[febyeji]

Nice, reading through the diff two small suggestions came to mind:

1. Ordering with X86-TSO: modify operational model and update ISA model #107: Since X86-TSO: modify operational model and update ISA model #107 renames addr_val → buffer_entry and refactors the surrounding
   lock/flush logic, might it be easier to land X86-TSO: modify operational model and update ISA model #107 first and rebase this one on top?

2. Litmus test for mixed-size: It might be worth adding a litmus test demonstrating the new mixed-size
   forwarding behaviour (e.g. a 4-byte write followed by a 2-byte read into the same range).

[tperami]

Some bit-fiddling could be improved, I showed an example, otherwise good to go