B.S. Electrical & Computer Engineering @ Carnegie Mellon University
Minor in Machine Learning | December 2026
I'm a systems and ML engineer passionate about building efficient, scalable, and intelligent infrastructure β from distributed protocols and real-time kernels to deep learning frameworks and agentic AI systems.
Currently building a personalized agent harness and continuing research at CMU on efficient LLM fine-tuning and dynamic model routing.
πΌ Industry experience:
- Capital One (Summer 2026) β led design of a full-stack KMS policy risk assessment tool on Capital One's GenAI Platform; built an agentic AI solution for automated compliance remediation, scaling to 500+ applications
- Capital One (Summer 2025) β engineered performance-testing infrastructure for Customer Relationships APIs across 15+ microservices (10K+ TPS, 5ms latency) serving 185M+ users
- Ansys (Spring 2025) β migrated Visual Studio solutions to CMake, improving cross-platform builds and CI for a large-scale C++ codebase
π¬ Research:
- CMU Research Assistant β LoRA fine-tuning pipelines for LLaMA 3 8B, contextual bandit model routing, and multi-adapter architecture benchmarking
π§ Mini Deep Learning Framework (Python, C++, CUDA)
- Built a minimal deep learning framework from scratch with tensor operations, reverse-mode automatic differentiation, and dynamic computation graphs
- Implemented optimized GPU kernels using CUDA for matrix multiplication, convolution, and gradient propagation β 20x speedup over CPU
- Integrated modular components for end-to-end training of MLPs and CNNs with performance profiling
π§© Technologies: Python, C++, CUDA, NumPy
ποΈ Query Execution Engine (C++)
- Designed a row-based vectorized query execution engine supporting sequential scans, inserts, updates, deletes, and B+Tree index scans with dynamic key-size template dispatching
- Architected hash join with Grace partitioning, nested loop/index joins, aggregation, external merge sort, and window functions
- Implemented optimizer rules to convert sequential scans into index scans and nested loop joins into hash joins
π§© Technologies: C++, Database Internals
π² Concurrent B+Tree Index (C++)
- Implemented a concurrent B+Tree index with thread-safe search, insertion, and deletion supporting node splitting, merging, and key redistribution
- Designed a tombstone buffer on leaf pages for deferred deletions as a simplified BΞ΅-tree optimization
- Applied optimistic latch crabbing with read/write page guards for high-throughput parallel operations without a global latch
π§© Technologies: C++, Concurrency, Data Structures
π Raft Consensus Algorithm (Go)
- Developed the Raft replicated state machine protocol with leader election, log replication, and commitment across concurrent peers via RPC
- Engineered AppendEntries and RequestVote RPCs with election timeouts, heartbeats, and election restriction for consistent leader election under network partitions
- Handled log consistency with conflict detection, nextIndex backtracking, and majority-based commit advancement
π§© Technologies: Go, Distributed Systems, Concurrency
π¨ Text-to-Image Generation with Q-Former (PyTorch)
- Trained a Q-Former adapter bridging a frozen GPT-2 and a frozen Diffusion Transformer (DiT) for text-conditioned image generation on CIFAR-10 with classifier-free guidance
- Constructed learnable query embeddings with multi-layer self-attention, cross-attention over GPT-2 hidden states, and per-layer projection to DiT conditioning vectors
π§© Technologies: PyTorch, Diffusion Models, Generative AI
βοΈ Distributed Bitcoin Miner (Go)
- Designed the Live Sequence Protocol (LSP) for reliable UDP communication with sliding window, exponential backoff, and checksum-based integrity
- Built a client-server architecture with load balancing, fault tolerance, and task redistribution
- Achieved concurrency using goroutines and channels for scalable, efficient shared computing
π§© Technologies: Go, Networking, UDP, Distributed Systems
β±οΈ Real-Time Operating System (C, ARM Assembly)
- Built a real-time kernel with context switching, task scheduling, and mutex synchronization on ARM Cortex-M
- Implemented rate-monotonic scheduling (RMS) with Utilization Bound schedulability checks
- Designed thread control blocks (TCBs) for priority-based multi-threading management
π§© Technologies: C, ARM Cortex-M, Embedded Systems, RTOS Design
π Fast Fourier Transform (Python, CUDA)
- Implemented FFT from first principles using the recursive Cooley-Tukey algorithm, reducing complexity from O(NΒ²) to O(N log N)
- Validated correctness against NumPy's backend and benchmarked performance vs. naive DFT to demonstrate scalability
π§© Technologies: Python, CUDA, Signal Processing
- π€ Building a personalized agent harness for customizable AI workflows
- π¬ Research on efficient LoRA fine-tuning and dynamic model routing at CMU
- π§ Exploring agentic AI systems and LLM-powered tooling
If you're interested in ML systems, agentic AI, or systems engineering, feel free to reach out β I love collaborating and discussing new ideas!



