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This is useful during incremental development when you get unsure if you are running the latest code or not. To use it do: make BTS=1 <target>
According to reset timing table in datasheet for PHY DP83826 the reset signal should be at least 25us and the reset to SMI ready is 2ms (I doubled those values for some margin).
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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