Can't load overlay on VEK280 gettingStarted

[David-Andrino]

Context

I've completed the Getting_Started/Vitis/Versal_w_EDF/VEK280 tutorial and want to load the results on the board.

I've compiled it with make sd_card after setting up the $YOCTO_ARTIFACTS directory and the $PLATFORM_REPO_PATHS. I have configured the Yocto Artifacts folder as instructed in the tutorial, and I am using the vek280_base platform from Xilinx, version 2026.1. I have installed the Vitis and Vivado suites, version 2026.1.

In the results folder, I get the following files:

-rwxrwxr-x 1 andrinod andrinod   85656 sep 29 09:55 aieml_system
-rwxrwxr-x 1 andrinod andrinod     776 sep 29 09:55 embedded_exec.sh
-rw-rw-r-- 1 andrinod andrinod 3411472 sep 29 09:55 krnl_aieml.pdi
-rw-rw-r-- 1 andrinod andrinod 6793265 sep 29 09:55 krnl_aieml.xclbin
-rw-rw-r-- 1 andrinod andrinod     521 sep 29 09:55 vek280.dtbo

I've tried with the following two images flashed to the SD card, obtaining the same results:

• edf-platform-disk-image-amd-cortexa72-common+versal-vek280-multidomain.rootfs-06092318.wic (EDF v26.06)
• edf-platform-disk-image-amd-cortexa72-common.rootfs-20260904223131.wic (EDF v26.06.1)

Problem

After copying all the files from the previous list on the home of the amd-edf user, I run the following command and get the following results:

amd-edf:~$ sudo ./embedded_exec.sh
Password:
INFO: Load the pdi and dtbo using fpgautil
mkdir: cannot create directory '/configfs': File exists
Failed to apply Overlay
Time taken to load BIN is 2.000000 Milli Seconds
BIN FILE loaded through FPGA manager successfull but failed to apply Overlay
The design will run 4 Iterations

Data sizes
INPUT_SIZEA: 16384 --> 16384
INPUT_SIZEB: 16384 --> 16384
OUTPUT_SIZEC1: 16384 --> 65536
OUTPUT_SIZEC2: 16384 --> 32768
Exception:  No such device with index '0'
FAILED TEST
ERROR: Embedded host run failed, RC=1
INFO: Embedded host run completed.

Diagnosis

I can see the following lines in the kernel buffer:

[   91.112812] OF: resolver: node label 'amba_pl' not found in live devicetree symbols table
[   91.112840] create_overlay: Failed to create overlay (err=-22)

Therefore, I think that the problem is that the device tree is missing the amba_pl symbol for the overlay to edit into. Both ./_x/package/sdtgen_out/pl.dtsi and ./_x/package/updated_zocl.dtsi mention that symbol for the FPGA, but looking at the device tree of the device, I don't have that symbol.

amd-edf:~$ ls -l /proc/device-tree/__symbols__/amba*
-r--r--r-- 1 root root  5 Sep 29 12:46 /proc/device-tree/__symbols__/amba
-r--r--r-- 1 root root  9 Sep 29 12:46 /proc/device-tree/__symbols__/amba_apu
-r--r--r-- 1 root root 16 Sep 29 12:46 /proc/device-tree/__symbols__/amba_xmpu
-r--r--r-- 1 root root 16 Sep 29 12:46 /proc/device-tree/__symbols__/amba_xppu

I've also tried to patch the device tree with lopper, following the instructions of Manual Flows for Building the Compatible PL Design Payload and Creating a Firmware Bundle. If I do that, I get a device tree overlay that uses the amba symbol, which I have, but trying to load it both with fpgautil and dfx-mgr-client throws an error, showing the following output in dmesg:

[  372.827604] (NULL device *): loading /lib/firmware/vek280.dtbo failed with error -22
[  372.827635] (NULL device *): Direct firmware load for vek280.dtbo failed with error -22