Quantinuum · cqc-alec · Mar 18, 2026
diff --git a/pytket/pytket/__init__.py b/pytket/pytket/__init__.py
@@ -14,10 +14,6 @@
 
 """Python Interface to tket"""
 
-import pytket.architecture
-import pytket.mapping
-import pytket.placement
-import pytket.transform
 from pytket._version import __version__
 from pytket.circuit import (
     Circuit,
@@ -53,4 +49,5 @@
     "__version__",
     "bit_width_64",
     "get_config_file_path",
+    "pytket",
 ]
diff --git a/pytket/pytket/_tket/passes.pyi b/pytket/pytket/_tket/passes.pyi
@@ -8,7 +8,6 @@ import sympy.core.expr
 import pytket._tket.architecture
 import pytket._tket.circuit
 import pytket._tket.mapping
-import pytket._tket.placement
 import pytket._tket.predicates
 import pytket._tket.transform
 import pytket._tket.unit_id
@@ -441,7 +440,7 @@ def RoutingPass(arc: pytket._tket.architecture.Architecture) -> BasePass:
     :return: a pass that routes to the given device architecture
     """
 
-def PlacementPass(placer: pytket._tket.placement.Placement) -> BasePass:
+def PlacementPass(placer: "tket::Placement") -> BasePass:
     """
     :param placer: The Placement used for relabelling.
     :return: a pass to relabel :py:class:`~.Circuit` Qubits to :py:class:`~.Architecture` Nodes
@@ -468,7 +467,7 @@ def RenameQubitsPass(qubit_map: Mapping[pytket._tket.unit_id.Qubit, pytket._tket
     :param qubit_map: map from old to new qubit names
     """
 
-def FullMappingPass(arc: pytket._tket.architecture.Architecture, placer: pytket._tket.placement.Placement, config: Sequence[pytket._tket.mapping.RoutingMethod]) -> BasePass:
+def FullMappingPass(arc: pytket._tket.architecture.Architecture, placer: "tket::Placement", config: Sequence[pytket._tket.mapping.RoutingMethod]) -> BasePass:
     """
     Construct a pass to relabel :py:class:`~.Circuit` Qubits to :py:class:`~.Architecture` Nodes, and then route to the connectivity graph of an :py:class:`~.Architecture`. Edge direction is ignored.
 
@@ -510,7 +509,7 @@ def ComposePhasePolyBoxes(min_size: int = 0) -> BasePass:
     :return: a pass to perform the composition
     """
 
-def CXMappingPass(arc: pytket._tket.architecture.Architecture, placer: pytket._tket.placement.Placement, **kwargs: Any) -> BasePass:
+def CXMappingPass(arc: pytket._tket.architecture.Architecture, placer: "tket::Placement", **kwargs: Any) -> BasePass:
     r"""
     Construct a pass to convert all gates to CX, relabel :py:class:`~.Circuit` Qubits to :py:class:`~.Architecture` Nodes, route to the connectivity graph of a :py:class:`~.Architecture` and decompose additional routing gates (SWAP and BRIDGE) to CX gates.
 

diff --git a/pytket/pytket/backends/__init__.py b/pytket/pytket/backends/__init__.py
@@ -20,3 +20,12 @@
 from .backend_exceptions import CircuitNotRunError, CircuitNotValidError
 from .resulthandle import ResultHandle
 from .status import CircuitStatus, StatusEnum
+
+__all__ = [
+    "Backend",
+    "CircuitNotRunError",
+    "CircuitNotValidError",
+    "CircuitStatus",
+    "ResultHandle",
+    "StatusEnum",
+]
diff --git a/pytket/pytket/circuit/__init__.py b/pytket/pytket/circuit/__init__.py
@@ -16,12 +16,8 @@
 tket :py:class:`~.Circuit` data structure.
 This module is provided in binary form during the PyPI installation."""
 
-from collections.abc import Callable, Sequence
-from typing import (
-    Any,
-    Optional,
-    Union,
-)
+from collections.abc import Sequence
+from typing import Any, Union
 
 from pytket import wasm
 from pytket._tket.circuit import (
@@ -364,6 +360,7 @@ def add_clexpr_from_logicexp(
 __all__ = [
     "_DEBUG_ONE_REG_PREFIX",
     "_DEBUG_ZERO_REG_PREFIX",
+    "BarrierOp",
     "BasisOrder",
     "BinaryOp",
     "Bit",
@@ -376,15 +373,20 @@ def add_clexpr_from_logicexp(
     "ClExprOp",
     "ClOp",
     "ClRegVar",
+    "ClassicalEvalOp",
+    "ClassicalOp",
     "Command",
     "Conditional",
     "ConjugationBox",
+    "CopyBitsOp",
     "CustomGate",
     "CustomGateDef",
     "DiagonalBox",
     "DummyBox",
+    "EdgeType",
     "ExpBox",
     "LogicExp",
+    "MetaOp",
     "MultiBitOp",
     "MultiplexedRotationBox",
     "MultiplexedTensoredU2Box",
@@ -413,9 +415,11 @@ def add_clexpr_from_logicexp(
     "ToffoliBox",
     "ToffoliBoxSynthStrat",
     "UnitID",
+    "UnitType",
     "Unitary1qBox",
     "Unitary2qBox",
     "Unitary3qBox",
+    "WASMOp",
     "WiredClExpr",
     "fresh_symbol",
     "if_bit",

diff --git a/pytket/pytket/circuit_library/__init__.py b/pytket/pytket/circuit_library/__init__.py
@@ -122,3 +122,114 @@
     ladder_down_2,
     ladder_up,
 )
+
+__all__ = [
+    "BRIDGE",
+    "CCX",
+    "CX",
+    "H_CZ_H",
+    "X1_CX",
+    "Z0_CX",
+    "BRIDGE_using_CX_0",
+    "BRIDGE_using_CX_1",
+    "C3X_normal_decomp",
+    "C4X_normal_decomp",
+    "CCX_modulo_phase_shift",
+    "CCX_normal_decomp",
+    "CH_using_CX",
+    "CRx_using_CX",
+    "CRx_using_TK2",
+    "CRy_using_CX",
+    "CRy_using_TK2",
+    "CRz_using_CX",
+    "CRz_using_TK2",
+    "CSWAP_using_CX",
+    "CSX_using_CX",
+    "CSXdg_using_CX",
+    "CS_using_CX",
+    "CSdg_using_CX",
+    "CU1_using_CX",
+    "CU1_using_TK2",
+    "CU3_using_CX",
+    "CV_using_CX",
+    "CVdg_using_CX",
+    "CX_S_CX_reduced",
+    "CX_S_V_XC_reduced",
+    "CX_VS_CX_reduced",
+    "CX_V_CX_reduced",
+    "CX_V_S_XC_reduced",
+    "CX_XC_reduced",
+    "CX_using_AAMS",
+    "CX_using_ECR",
+    "CX_using_ISWAPMax",
+    "CX_using_ISWAPMax_and_swap",
+    "CX_using_TK2",
+    "CX_using_XXPhase_0",
+    "CX_using_XXPhase_1",
+    "CX_using_ZZMax",
+    "CX_using_ZZPhase",
+    "CX_using_flipped_CX",
+    "CY_using_CX",
+    "CZ_using_CX",
+    "CnX_vchain_decomp",
+    "ECR_using_CX",
+    "ESWAP_using_CX",
+    "ESWAP_using_TK2",
+    "FSim_using_CX",
+    "FSim_using_TK2",
+    "ISWAPMax_using_CX",
+    "ISWAPMax_using_TK2",
+    "ISWAP_using_CX",
+    "ISWAP_using_TK2",
+    "NPhasedX_using_PhasedX",
+    "PhasedISWAP_using_CX",
+    "PhasedISWAP_using_TK2",
+    "Rx_using_GPI",
+    "Ry_using_GPI",
+    "Rz_using_GPI",
+    "SWAP_using_CX_0",
+    "SWAP_using_CX_1",
+    "TK1_to_PhasedX",
+    "TK1_to_PhasedXRz",
+    "TK1_to_RxRy",
+    "TK1_to_RzH",
+    "TK1_to_RzRx",
+    "TK1_to_RzSX",
+    "TK1_to_RzXSX",
+    "TK1_to_TK1",
+    "TK1_to_U3",
+    "TK1_using_GPI",
+    "TK2_using_3xCX",
+    "TK2_using_AAMS",
+    "TK2_using_CX",
+    "TK2_using_CX_and_swap",
+    "TK2_using_ISWAPMax",
+    "TK2_using_ISWAPMax_and_swap",
+    "TK2_using_TK2",
+    "TK2_using_TK2_or_swap",
+    "TK2_using_ZZMax",
+    "TK2_using_ZZMax_and_swap",
+    "TK2_using_ZZPhase",
+    "TK2_using_ZZPhase_and_swap",
+    "TK2_using_normalised_TK2",
+    "X",
+    "XXPhase3_using_CX",
+    "XXPhase3_using_TK2",
+    "XXPhase_using_AAMS",
+    "XXPhase_using_CX",
+    "XXPhase_using_TK2",
+    "YYPhase_using_AAMS",
+    "YYPhase_using_CX",
+    "YYPhase_using_TK2",
+    "ZZMax_using_CX",
+    "ZZPhase_using_AAMS",
+    "ZZPhase_using_CX",
+    "ZZPhase_using_TK2",
+    "approx_TK2_using_1xCX",
+    "approx_TK2_using_1xZZPhase",
+    "approx_TK2_using_2xCX",
+    "approx_TK2_using_2xZZPhase",
+    "ladder_down",
+    "ladder_down_2",
+    "ladder_up",
+]
diff --git a/pytket/pytket/config/__init__.py b/pytket/pytket/config/__init__.py
@@ -22,3 +22,11 @@
     load_config_file,
     write_config_file,
 )
+
+__all__ = [
+    "PytketConfig",
+    "PytketExtConfig",
+    "get_config_file_path",
+    "load_config_file",
+    "write_config_file",
+]
diff --git a/pytket/pytket/passes/__init__.py b/pytket/pytket/passes/__init__.py
@@ -19,3 +19,10 @@
 from .passselector import PassSelector
 from .resizeregpass import scratch_reg_resize_pass
 from .script import compilation_pass_from_script, compilation_pass_grammar
+
+__all__ = [
+    "PassSelector",
+    "compilation_pass_from_script",
+    "compilation_pass_grammar",
+    "scratch_reg_resize_pass",
+]
diff --git a/pytket/pytket/qasm/__init__.py b/pytket/pytket/qasm/__init__.py
@@ -27,3 +27,15 @@
     circuit_to_qasm_io,
     circuit_to_qasm_str,
 )
+
+__all__ = [
+    "circuit_from_qasm",
+    "circuit_from_qasm_io",
+    "circuit_from_qasm_str",
+    "circuit_from_qasm_str_wasm",
+    "circuit_from_qasm_str_wasmmh",
+    "circuit_from_qasm_wasm",
+    "circuit_to_qasm",
+    "circuit_to_qasm_io",
+    "circuit_to_qasm_str",
+]
diff --git a/pytket/pytket/quipper/__init__.py b/pytket/pytket/quipper/__init__.py
@@ -15,3 +15,7 @@
 """Parser from Quipper ASCII to tket circuits"""
 
 from .quipper import circuit_from_quipper
+
+__all__ = [
+    "circuit_from_quipper",
+]
diff --git a/pytket/pytket/transform/__init__.py b/pytket/pytket/transform/__init__.py
@@ -19,3 +19,7 @@
 
 from pytket._tket.circuit import CXConfigType
 from pytket._tket.transform import *
+
+__all__ = [
+    "CXConfigType",
+]
diff --git a/pytket/pytket/unit_id/__init__.py b/pytket/pytket/unit_id/__init__.py
@@ -106,3 +106,8 @@ def logic_operation(self: RegArgType, other: RegArgType) -> RegLogicExp:
 setattr(BitRegister, "__pow__", _gen_binary_method_reg(RegWiseOp.POW, "__pow__"))  # noqa: B010
 setattr(BitRegister, "__lshift__", _gen_binary_method_reg(RegWiseOp.LSH, "__lshift__"))  # noqa: B010
 setattr(BitRegister, "__rshift__", _gen_binary_method_reg(RegWiseOp.RSH, "__rshift__"))  # noqa: B010
+
+__all__ = [
+    "_TEMP_BIT_NAME",
+    "_TEMP_BIT_REG_BASE",
+]
diff --git a/pytket/pytket/utils/__init__.py b/pytket/pytket/utils/__init__.py
@@ -43,3 +43,31 @@
 from .stats import gate_counts
 from .symbolic import circuit_apply_symbolic_statevector, circuit_to_symbolic_unitary
 from .term_sequence import gen_term_sequence_circuit
+
+__all__ = [
+    "EmpiricalDistribution",
+    "Graph",
+    "OutcomeArray",
+    "ProbabilityDistribution",
+    "QubitPauliOperator",
+    "append_pauli_measurement",
+    "circuit_apply_symbolic_statevector",
+    "circuit_to_symbolic_unitary",
+    "compare_statevectors",
+    "compare_unitaries",
+    "convex_combination",
+    "counts_from_shot_table",
+    "expectation_from_counts",
+    "expectation_from_shots",
+    "gate_counts",
+    "gen_term_sequence_circuit",
+    "get_operator_expectation_value",
+    "get_pauli_expectation_value",
+    "permute_basis_indexing",
+    "permute_qubits_in_statevector",
+    "permute_rows_cols_in_unitary",
+    "prepare_circuit",
+    "probs_from_counts",
+    "probs_from_state",
+    "readout_counts",
+]
diff --git a/pytket/pytket/wasm/__init__.py b/pytket/pytket/wasm/__init__.py
@@ -20,3 +20,8 @@
     WasmFileHandler,
     WasmModuleHandler,
 )
+
+__all__ = [
+    "WasmFileHandler",
+    "WasmModuleHandler",
+]
diff --git a/pytket/ruff.toml b/pytket/ruff.toml
@@ -82,5 +82,4 @@ lint.ignore = [
 ]
 
 [lint.per-file-ignores]
-"__init__.py" = ["F401"]
 "**/{tests}/*" = ["PLR2004"]
diff --git a/pytket/tests/simulator/__init__.py b/pytket/tests/simulator/__init__.py
@@ -14,3 +14,9 @@
 
 from .tket_sim_backend import TketSimBackend, TketSimShotBackend
 from .tket_sim_wrapper import TketSimWrapper
+
+__all__ = [
+    "TketSimBackend",
+    "TketSimShotBackend",
+    "TketSimWrapper",
+]