#291 - Hardware-Based Packet Reordering

[cliffburdick]

This PR introduces hardware-based packet reordering for supported cyclic sequence-number patterns. Rather than launching a GPU kernel to reorder packets, the ibverbs engine uses the mlx5 flex parser and flow steering to place each payload directly into its final CPU- or GPU-memory slot. The host CPU polls CQEs and publishes an aggregate only after every packet in the batch has arrived.

Hardware reorder is explicit opt-in (reorder_engine: hw) and requires cyclic_sequence: true. The sampled 32-bit destination value must cycle over the configured finite output ring; wide monotonic sequence values should continue using reorder_engine: sw, which remains the default.

Direct-placement ownership is tied to burst lifetime: each fixed slot has one receive credit, and DAQIRI does not rearm any slot in an aggregate while the returned burst is ready or application-owned. Freeing the burst publishes one replacement credit for every destination in that batch.

Requirements and validation:

• ConnectX-7 or newer mlx5 hardware with flex-parser and RX flow-table support.
• Rebased on the latest origin/main (7385da5).
• Complete Release container build with DAQIRI_ENGINE="dpdk ibverbs" passes.
• Documentation reference validation passes.
• 12-second CX-7 cabled test using GPU device memory delivered 13,501,440 packets in 13,185 complete direct-placed batches, with zero duplicates, malformed packets, ownership violations, CQ/tag/WQE errors, or ring-full retries.
• Stable receive samples were approximately 74.8-74.9 Gb/s on this test setup.

The hardware path has not yet been validated on DGX Spark/GB10.

[greptile-apps]

Greptile Summary

Hardware-based packet reordering is added as an explicit opt-in path for the raw ibverbs engine.

• Uses mlx5 flex parsing and flow steering for direct placement into ordered CPU or GPU output slots.
• Requires reorder_engine: hw with cyclic_sequence: true; software reorder remains the default.
• Ties receive-credit rearming to application burst release to preserve buffer ownership.
• Updates public configuration types, Python bindings, examples, benchmarks, and user documentation.
• The latest revision corrects an in-page documentation link to the hardware-reorder walkthrough.

Confidence Score: 5/5

The PR appears safe to merge; the previous blocking findings are fixed and no actionable issue remains in the latest revision.

Software reorder is restored as the compatibility default, hardware reorder explicitly rejects unsupported wide monotonic sequence configurations, and direct-placement slots are not rearmed until the caller frees the owning burst. The latest documentation-only change correctly targets the existing hardware packet reordering section.

Important Files Changed

Filename	Overview
src/engines/ibverbs/daqiri_ibverbs_engine.cpp	Implements mlx5 direct-placement setup, completion aggregation, slot ownership, and rearming for hardware reorder.
src/engines/ibverbs/daqiri_ibverbs_engine.h	Adds the state and helper declarations needed for direct-placement queues and aggregate lifecycle management.
include/daqiri/types.h	Exposes hardware/software reorder selection, cyclic-sequence acknowledgement, and packet-size configuration while retaining software reorder as the default.
src/common.cpp	Parses and validates the new reorder configuration fields.
python/daqiri_common_pybind.cpp	Exposes the new reorder configuration fields through the Python bindings.
docs/tutorials/configuration-walkthrough.md	Documents hardware reorder configuration and now links to the correct walkthrough anchor.

_{Reviews (7): Last reviewed commit: "#291 - Add hardware packet reordering" | Re-trigger Greptile}