SDIO enumeration, firmware upload, and RF-link association are all done and hardware-validated, and the full-rate video downlink runs on top. A few control bits remain characterized on-wire-only and not fully modeled: register 0x13 beyond bit 4, and the UDP-port reroute. Model them from capture if a use case needs them.
SDIO enumeration, firmware upload, and RF-link association are all done and hardware-validated, and the full-rate video downlink runs on top. A few control bits remain characterized on-wire-only and not fully modeled: register
0x13beyond bit 4, and the UDP-port reroute. Model them from capture if a use case needs them.