[Perf] Add cross-GPU subgroup.ballot(predicate) primitive#600
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hughperkins wants to merge 6 commits intohp/cross-gpu-subgroupfrom
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[Perf] Add cross-GPU subgroup.ballot(predicate) primitive#600hughperkins wants to merge 6 commits intohp/cross-gpu-subgroupfrom
hughperkins wants to merge 6 commits intohp/cross-gpu-subgroupfrom
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Implement a portable ballot operation that returns a u32 bitmask where bit i is set if lane i's predicate is non-zero. Works across CUDA (__ballot_sync), AMDGPU (amdgcn_ballot.i32), and SPIR-V/Vulkan (OpGroupNonUniformBallot). Follows the same cross-backend pattern as subgroup.shuffle: a single Python API (subgroup.ballot) dispatches to the appropriate backend intrinsic at codegen time. On AMDGPU CDNA with 64-wide wavefronts only the low 32 bits are returned, consistent with the u32 return type.
hughperkins
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May 9, 2026
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doc looks ok to me
added 3 commits
May 9, 2026 21:05
# Conflicts: # docs/source/user_guide/subgroup.md
Mac OS X build was failing because spirv_codegen.cpp was accessing IRBuilder::t_v4_uint_ directly, which is a private member. Add a public v4_u32_type() accessor following the existing pattern (u32_type(), bool_type(), etc.) and use it from the ballot lowering.
…ross-gpu-ballot # Conflicts: # docs/source/user_guide/subgroup.md # python/quadrants/lang/simt/subgroup.py # quadrants/codegen/amdgpu/codegen_amdgpu.cpp # quadrants/codegen/cuda/codegen_cuda.cpp # quadrants/codegen/spirv/spirv_codegen.cpp
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Implement a portable ballot operation that returns a u32 bitmask where bit i is set if lane i's predicate is non-zero. Works across CUDA (__ballot_sync), AMDGPU (amdgcn_ballot.i32), and SPIR-V/Vulkan (OpGroupNonUniformBallot).
Follows the same cross-backend pattern as subgroup.shuffle: a single Python API (subgroup.ballot) dispatches to the appropriate backend intrinsic at codegen time. On AMDGPU CDNA with 64-wide wavefronts only the low 32 bits are returned, consistent with the u32 return type.
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