Skip to content

Actions: tscircuit/hypergraph

Actions

Benchmark

Actions

Loading...
Loading

Show workflow options

Create status badge

Loading
benchmark.yml
233 workflow runs
233 workflow runs

Filter by Event

⌥ + click/return to exclude

Filter by Status

⌥ + click/return to exclude

Filter by Branch

⌥ + click/return to exclude

Filter by Actor

⌥ + click/return to exclude
fix: 4-via-region topology missing port (#115) Benchmark #108: Commit f380d05 pushed by ShiboSoftwareDev
19s main
main
19s
fix: 4-via-region topology missing port Benchmark #107: Issue comment #115 (comment) created by vercel Bot
Skipped
Skipped
Introduce Automatic Via Tile Selection for Convex Via Graph Generation scoring 100% on dataset2 Benchmark #106: Issue comment #112 (comment) created by tscircuitbot
Skipped
Skipped
chore: bump version to v0.0.52 Benchmark #105: Issue comment #114 (comment) created by tscircuitbot
2s
2s
v0.0.52 (#114) Benchmark #104: Commit ee49ece pushed by tscircuitbot
1m 56s main
main
1m 56s
chore: bump version to v0.0.52 Benchmark #103: Issue comment #114 (comment) created by vercel Bot
1s
1s
Introduce Automatic Via Tile Selection for Convex Via Graph Generatio… Benchmark #102: Commit 3e4ad34 pushed by Abse2001
29m 15s main
main
29m 15s
Refactor Convex Via Graph Generation to Enable Base-Graph Caching by Width and Height Benchmark #101: Issue comment #113 (comment) created by vercel Bot
3s
3s
Introduce Automatic Via Tile Selection for Convex Via Graph Generation scoring 100% on dataset2 Benchmark #100: Issue comment #112 (comment) created by vercel Bot
1s
1s
Added Optimized 6 net Via Topology for Improved Solve Performance Benchmark #99: Issue comment #110 (comment) created by tscircuitbot
1s
1s
chore: bump version to v0.0.51 Benchmark #98: Issue comment #111 (comment) created by tscircuitbot
2s
2s
chore: bump version to v0.0.51 Benchmark #97: Issue comment #111 (comment) created by vercel Bot
1s
1s
v0.0.51 (#111) Benchmark #96: Commit c21dbfa pushed by tscircuitbot
27m 49s main
main
27m 49s
Added Optimized 6 net Via Topology for Improved Solve Performance (#110) Benchmark #95: Commit 633d351 pushed by Abse2001
28m 49s main
main
28m 49s
Added Optimized 6 net Via Topology for Improved Solve Performance Benchmark #94: Issue comment #110 (comment) created by vercel Bot
1s
1s
Improve via graph topology: exclusive via regions, T-intersection detection, filler region routing, ripcost to via regions Benchmark #93: Issue comment #102 (comment) created by tscircuitbot
1s
1s
Added Optimize 3 net Via Topology for Improved Solve Performance Benchmark #92: Issue comment #108 (comment) created by tscircuitbot
1s
1s
Optimize via‑tile parsing with new SVG generation script to shrink 5‑region geometry and reach 98.7% solve rate Benchmark #91: Issue comment #106 (comment) created by tscircuitbot
1s
1s
chore: bump version to v0.0.48 Benchmark #90: Issue comment #105 (comment) created by tscircuitbot
1s
1s
chore: bump version to v0.0.49 Benchmark #89: Issue comment #107 (comment) created by tscircuitbot
1s
1s
chore: bump version to v0.0.50 Benchmark #88: Issue comment #109 (comment) created by tscircuitbot
1s
1s
v0.0.50 (#109) Benchmark #87: Commit 7c0ff83 pushed by tscircuitbot
28m 59s main
main
28m 59s
chore: bump version to v0.0.50 Benchmark #86: Issue comment #109 (comment) created by vercel Bot
Skipped
Skipped
Added Optimize 3 net Via Topology for Improved Solve Performance (#108) Benchmark #85: Commit 2a9e598 pushed by ShiboSoftwareDev
29m 1s main
main
29m 1s
Added Optimize 3 net Via Topology for Improved Solve Performance Benchmark #84: Issue comment #108 (comment) created by vercel Bot
1s
1s