QEC/qLDPC: route one parity-check syndrome round to a verified physical schedule

[arniber21]

What to build

Lower one qLDPC parity-check syndrome-extraction round from the existing graph/resource model into a verified physical neutral-atom schedule.

Issue #285 intentionally delivered a sizing/workload prototype, and #478 exposes it through quonc; neither routes checks or claims a physical schedule. This issue is the next honest tracer bullet: choose one small checked-in parity-check graph, generate its ancilla interactions and measurements, place/route them on a generic zoned NA target, and emit the same schedule/resource artifacts as the surface/repetition paths.

Design review is required for the ancilla/check scheduling model and for how much parallelism/movement pressure the first slice claims.

Acceptance criteria

• An ADR defines the first physical qLDPC slice, including data/ancilla mapping, check ordering, measurement/reset policy, and unsupported decoder behavior.
• A checked-in toy parity-check graph lowers to explicit syndrome interactions, ancilla measurements, and round barriers.
• The generated workload passes through normal NA placement, movement, scheduling, compaction, canonical quantum.na, and final verification.
• Resource reports derive check weight, edge count, ancilla/peak atoms, movement, transfers, measurement rounds, idle time, and cycles from the physical schedule rather than only the sizing formula.
• Graph/workload identities survive serialization so the physical artifact can be traced to its parity checks.
• Unsupported graphs/capacity constraints fail with actionable diagnostics rather than silently returning only an analytic estimate.
• Tests cover at least one successful toy round, insufficient zone capacity, malformed check data, and deterministic round-trip output.
• Documentation states clearly: no decoder, no sampled threshold result, no hardware calibration claim, and no claim of scalable qLDPC routing yet.

Out of scope

• Full [[144,12,12]] routing if it does not fit the first bounded slice.
• Decoder implementation, logical-error-rate estimation, or threshold claims.
• Automatic selection of a qLDPC family for an application.

Blocked by

• quonc: expose qLDPC resource model as a reviewer-runnable artifact (CLI path for #285) #478 — reviewer-runnable qLDPC graph/resource entry point
• NA verifier: replay compacted schedules against the complete target architecture #481 — complete final physical schedule replay

Related

• QEC research: prototype qLDPC-style workload IR and resource model #285 — qLDPC-style workload/resource prototype
• ADR-0030 — sizing-only scope being extended by this new reviewed slice
• Epic: QEC-aware neutral-atom compilation path #245 — QEC-aware compilation path