The diagnostic executes full lvx / lvx128 and stvx / stvx128 memory emissions through checked runtime hooks. Effective addresses use a wrapping 32-bit sum (RA zero contributes no value) and clear the low four bits. IBM's PowerPC vector addressing description, section 2.2, specifies naturally aligned 16-byte full-vector access.
Pinned XenonRecomp revision ddd128bcca99fe8bfbb99bea583c972351fa6ace, recompiler.cpp, reverses all sixteen guest bytes into its internal vector register representation. Its ppc_context.h defines VectorMaskL with the prefix 15 through 0. The generator requires that prefix in the copied input header before publishing any rewritten vector functions. It matches complete original emission lines and their instruction operands, including register limits and address expressions. Partial/element operations, changed masks, mismatches, and missing emissions remain explicit stops. lvsl / lvsr mask construction is separate from guest memory access.
vector_memory.cpp checks the complete aligned range before reading two big-endian 64-bit halves. This samples each overlapping computed word provider once. Only a fully returned temporary is copied into the destination vector register; a failing second-half provider cannot partially update it. Stores copy the source register, check the complete writable range, and then write two big-endian halves with the inverse byte mapping. Logical tails, guards, read-only providers and live reservations stop before any store. This is failure containment in the single-thread diagnostic, not a claim of atomic 128-bit stores or concurrent vector access support.
Native tests cover distinct byte patterns, all sixteen unaligned effective-address offsets, the final address-space block, range/guard failures, computed-provider sampling and exceptions, read-only/reservation interference, unchanged source and neighboring bytes. Generator tests cover exact operand matching, CRLF input, register limits, mask validation, unsupported/no-op emissions and input preservation. Runtime hooks alter only the intended vector bytes or guest destination memory; they do not assign condition registers or GPRs.
The fresh out/recomp/diagnostic-vectors report retains 31,064 functions and stops 15,439, a net increase of 1,136 retained functions. Emitted sites include 7,087 vector loads, 7,316 vector stores, 31 time-base reads, 472 reservation loads and 502 conditional stores. These counts are not execution coverage or proof of the remaining SIMD arithmetic. Graphics, audio and input are still absent, and at that checkpoint only the Windows host had been run.
The subsequent stvewx / stvewx128 increment writes just one four-byte element. The pinned emitter aligns the 32-bit effective address down to four bytes and chooses internal word 3 - ((ea & 15) >> 2). The byte-oriented helper uses byte index 12 - (ea & 12), assembles its four bytes without a host-endian union assumption, and calls one checked big-endian scalar store. A four-byte logical mapping is sufficient; unrelated guest bytes are neither read nor written. All sixteen effective-address offsets, the final address-space word, source and neighboring-byte preservation, guards, short mappings, read-only providers and reservations are tested.
The generator preserves the original ea assignment and replaces only the matched store. Register, address, width, lane and mask mismatches still stop. Element loads, halfword element stores and partial-vector transfers remain unsupported. The runtime adapter copies only the source register bytes and does not assign guest flags or GPRs.
Latest output out/recomp/diagnostic-vector-words retains 31,074 functions and stops 15,429: ten additional retained functions and no new rejected functions. It contains 133 word stores, 7,224 full-vector loads and 7,338 full-vector stores. The original source has 607 word stores overall; most remain inside functions rejected for other reasons. Time-base and reservation site counts are unchanged. Windows build, 94 Python tests, ten native tests, and independent spec/quality reviews passed. Real boot still stops at EtxProducerRegister after 347 entries; this increment adds instruction support without claiming progress past that service.
The same native vector tests subsequently passed with GCC 14.2.1 on Arch Linux under WSL2, as recorded in linux-core.md. This is runtime-core coverage, not execution of the complete generated diagnostic on Linux.