diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index 0ec58e9cdbe..88f42c7f409 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -203,6 +203,7 @@ config EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG
 config EC_GOOGLE_CHROMEEC_AFTER_G3_STATE
 	bool "Enable syncing ChromeEC After G3 State with CFR at boot"
 	depends on DRIVERS_OPTION_CFR_ENABLED
+	select HAVE_EC_POWER_STATE_AFTER_FAILURE
 	help
 	  Enable syncing ChromeEC After G3 State with CFR at boot via host
 	  command, otherwise ChromeEC default compiled after G3 behavior
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig
index 40080125a38..80645904c56 100644
--- a/src/mainboard/Kconfig
+++ b/src/mainboard/Kconfig
@@ -202,6 +202,9 @@ config ENABLE_POWER_BUTTON
 	def_bool y if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_ENABLE
 	def_bool n if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_DISABLE
 
+config HAVE_EC_POWER_STATE_AFTER_FAILURE
+	bool
+
 config HAVE_POWER_STATE_AFTER_FAILURE
 	bool
 
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 64b9bb997c6..f5e7ba5e3e8 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -776,8 +776,14 @@ void pmc_clear_pmcon_sts(void)
 
 void pmc_set_power_failure_state(const bool target_on)
 {
-	const unsigned int state = get_uint_option("power_on_after_fail",
-					 CONFIG_MAINBOARD_POWER_FAILURE_STATE);
+	/*
+	 * Always set to "auto on" to avoid potential conflicts with EC that
+	 * can result in the inability to boot if EC handles after G3.
+	 */
+	const unsigned int state = (CONFIG(HAVE_EC_POWER_STATE_AFTER_FAILURE) ?
+				    MAINBOARD_POWER_STATE_ON :
+				    get_uint_option("power_on_after_fail",
+				         CONFIG_MAINBOARD_POWER_FAILURE_STATE));
 
 	/*
 	 * On the shutdown path (target_on == false), we only need to