After learning a lot more and returning to the HGCROC tuning presentation shared with me via some CMS folks, I think the pedestal leveling procedure can be refactored to be more inline with past experience and support Silicon HGCROC chips (that do not have the DACB, SIGN_DAC channel parameters).
First, there is "local" pedestal leveling which is focused on getting all of the channels within a ROC-half to be near to their medians. This is done currently by tasks.level_pedestals but it does not follow the outline laid out by our CMS colleagues (although it gets close due to the stability of the chip).
- Update to have
TRIM_INV: 32 and DACB: 0 be the "baseline" run that defines the target medians over certain halves
- Do a grid search over
TRIM_INV (and DACB) to find the settings for a specific channel that gets it closes to the half-median
- While a full grid search is feasible in a pedestal-stable scenario (we only need ~100 events which only takes ~1ms), I think we could avoid a full 64*64 = 4096 runs by doing something slightly smarter per channel, but I don't think I'll want to implement that right away anyways.
- Rename to
local_pedestal_level or similar to clarify its purpose
Second, there is "global" pedestal leveling which is focused on moving all of the ROC-halves to have pedestals near a pre-set value. This is currently done by tasks.inv_vref_scan (or tasks.inv_vref_scan_lund). I'm less familiar with the implemenation of those scans, but I do think at minimum we can re-name them so that they are more understandable for the user. The general idea is to use the per-half parameters of inv_vref and noinv_vref to shift all the channels within the ROC-halves together. ⚠️ Also note that the current tasks.inv_vref_scan have not including the "unshuffling" using the SingleECONDeRxMapping.
Finally, I think it could be helpful to have a parent task that does the procedure outlined in the wiki and in the slides where we do local pedestal leveling both before and after global pedestal leveling.
After learning a lot more and returning to the HGCROC tuning presentation shared with me via some CMS folks, I think the pedestal leveling procedure can be refactored to be more inline with past experience and support Silicon HGCROC chips (that do not have the
DACB,SIGN_DACchannel parameters).First, there is "local" pedestal leveling which is focused on getting all of the channels within a ROC-half to be near to their medians. This is done currently by
tasks.level_pedestalsbut it does not follow the outline laid out by our CMS colleagues (although it gets close due to the stability of the chip).TRIM_INV: 32andDACB: 0be the "baseline" run that defines the target medians over certain halvesTRIM_INV(andDACB) to find the settings for a specific channel that gets it closes to the half-medianlocal_pedestal_levelor similar to clarify its purposeSecond, there is "global" pedestal leveling which is focused on moving all of the ROC-halves to have pedestals near a pre-set value. This is currently done by⚠️ Also note that the current
tasks.inv_vref_scan(ortasks.inv_vref_scan_lund). I'm less familiar with the implemenation of those scans, but I do think at minimum we can re-name them so that they are more understandable for the user. The general idea is to use the per-half parameters ofinv_vrefandnoinv_vrefto shift all the channels within the ROC-halves together.tasks.inv_vref_scanhave not including the "unshuffling" using theSingleECONDeRxMapping.Finally, I think it could be helpful to have a parent task that does the procedure outlined in the wiki and in the slides where we do local pedestal leveling both before and after global pedestal leveling.